Assessing the optoelectronic behavior of soiled silicon photovoltaic cell under harsh environmental conditions
Document Type
Article
Publication Date
2023
Abstract
In the current study, a monocrystalline Si photovoltaic (PV) cell was modeled using solar cell capacitance simulator (SCAPS) to demonstrate the optoelectronic performance of the cell under harsh environmental conditions. Harsh conditions are simulated in terms of wind speed and temperature fluctuations within the presence of a dust layer. All models are evaluated with respect to a bare model with no dust layer accumulated and operating under standard test conditions (STC). Accordingly, the PV under-test characteristics have been estimated under continuous wind speed and temperature variations. An interesting behavior for the cell operation under relatively high temperatures with an accumulated dust layer was observed. The short circuit current increased by 61.5% with decreasing open-circuit voltage by 47.3%, showing an overall positive trend for the power harvested. Such behavior contradicts the average temperature performance of cells without dust layer accumulation. A detailed justification is illustrated, where the heat transfer rate with dust accumulation highlighted an incremental increase concerning the bare cell by 14.57%.
Recommended Citation
Amr, Lamis; Abdellatif, Sameh O. Dr; Ghali, Hani; and Kirah, Khaled, "Assessing the optoelectronic behavior of soiled silicon photovoltaic cell under harsh environmental conditions" (2023). Electrical Engineering. 13.
https://buescholar.bue.edu.eg/elec_eng/13